(a) Field of the Invention
The present invention relates to a method for forming metal wiring of a semiconductor device and, in particular, to a method for forming the metal wiring in a semiconductor device through a dual damascene process.
(b) Description of the Related Art
Recently, as semiconductor devices have become highly integrated and process techniques have been enhanced, conventional aluminum wirings are being replaced by copper wirings for improving the device characteristics, such as operation speed and resistance of the device, and parasitic capacitance between the metals.
However, since the copper has very poor etching characteristics, a damascene process has replaced the conventional etching process.
In the damascene process, a dual damascene pattern having trenches for forming via holes and wirings in an inter metal dielectric is formed, and then a copper layer is deposited thickly enough to fill the contact holes. After forming the dual damascene pattern, an annealing process is performed on the copper layer so as to remove the impurities that are intruded during the deposition of the copper layer. A polishing process is carried out on the upper surface of the inter metal dielectric using a chemical mechanical polishing technique. Thus, metal wirings and plugs are formed.
However, the dual damascene technique has a drawback in that the photolithography process should be performed at least twice, since contact holes having different diameters are formed. Accordingly, it takes long time to fabricate the devices, resulting in a reduction of production yield.